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Computer Graphics & Design of Low Voltage 1.8V, Wide Range 50~500MHz Delay Locked Loop for DDR SDRAM
Gu In Jae , Jeong Gang Min The KIPS Transactions:PartA,
Vol. 10, No. 3, pp. 247-254,
Aug.
2003
10.3745/KIPSTA.2003.10.3.247
10.3745/KIPSTA.2003.10.3.247
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All publications of KTCCS is indexed in DOI, EBSCO, Google Scholar, Crossref, and CrossCheck.
KTCCS is also selected as the Journal for Accreditation by NRF (National Research Foundation of Korea).
